BCH (15,11,1) Algorithm With VHDL



Published 7/2022
MP4 | Video: h264, 1280×720 | Audio: AAC, 44.1 KHz
Language: English | Size: 195.64 MB | Duration: 0h 31m
VHDL Code of BCH (15,11,1) algorithm


What you’ll learn
Define the coding theory
Define the Bose-Chaudhuri-Hocquenghem (BCH) codes
Define the types of BCH codes
Explain the BCH (15,11,1) encoder with VHDL
Explain the BCH (15,11,1) decoder with VHDL
Requirements
Basic Understanding of telecommunication.
Basic Understanding of Digital Logic Gates.
Xilinx ISE Design Suite 14.7 Software.
Description
The course contains some lectures that explain in detail the Bose-Chaudhuri-Hocquenghem codes (15,11,1) algorithm used for error detection and correction. the number 15 is referring to the total transmitted message bit size, 11 is the information bit size, and 1 is the number of errors that can be detected and corrected.the course contains a VHDL code for the algorithm that is attached to the lectures that you can download and use it.This course targets the VHDL code and the FPGA implementation of this algorithm. it will be helpful for the undergraduate engineering students and the postgraduate also.the VHDL codes are not easy to be valid on the websites so it is difficult to find the VHDL code for a certain project that works correctly but in this course, the full VHDL code will be available with its test bench so you can download and adjust it as you want.You will learn by doing real VHDL programming. All the code and syntax are attached. After you adjust the existing code or you create your own, you will run simulations to verify it. If you are interested to run your code on real hardware (not required, but much more fun), we recommend Altera or Xilinx boards.
Overview
Section 1: Introduction
Lecture 1 Introduction of Coding theory
Lecture 2 The BCH and its types
Lecture 3 The BCH (15,11,1) encoder with VHDL
Lecture 4 The BCH (15,11,1) decoder with VHDL
Lecture 5 Practical Examples with VHDL
The communication Engineers.,The Engineering Undergraduate and Postgraduate Students.,Digital Circuits Designers.,The Test Engineers.,The Engineering Project Manager.,The System Engineers.,The Embedded System Engineers.,Individuals pursuing Electrical Engineering,Anyone interested to learn Xilinx FPGA/ Vivado Design Suite/ VHDL Hardware Description Language

Homepage

https://www.udemy.com/course/bch-15111-algorithm-with-vhdl-fpga/

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